Senior architect
Company
Qualcomm Technologies, Inc. Job Area Engineering Group, Engineering Group > Machine Learning Engineering General Summary Today, more intelligence is moving to end devices, and mobile is becoming a pervasive AI platform. At the same time, data centers are expanding AI capability through widespread deployment of ML accelerators. Qualcomm envisions making AI ubiquitous - expanding beyond mobile and powering other end devices, data centers, vehicles, and things. We are inventing, developing, and commercializing power-efficient on-device AI, edge cloud AI, data center and 5G to make this a reality. We are looking for Performance Architecture Engineers to drive performance and power enhancements into the HW and SW stacks of state-of-the-art machine learning solutions. The Performance Architecture team is comprised of experts that span the full gamut from Performance modeling, algorithm development, kernel optimization, hardware accelerator architecture and SOC design. The ideal candidate will augment the team by contributing to one or many of these areas. Minimum Qualifications- Bachelor's degree in Computer Science, Engineering, Information Systems, or related field and 2+ years of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience.
- Develop and enhance performance models that will accurately predict performance and power consumption for various AI workloads
- Understand trends in ML network design, through customer engagements and latest academic research, and determine how this will affect both SW and HW design
- Analyze ML/AI algorithms and workloads on exploratory and existing Qualcomm HW and SW stacks through simulation and on-device characterization
- Define, model and tune algorithms for ML/AI compilers, kernels and HW features to improve mappings of ML/AI workloads on existing and future HW
- Contribute new and evolutionary features to models of HW and SW
- Pre-Silicon prediction of performance for various ML algorithms
- Perform analysis of performance/area/power trade-offs for future HW and SW ML algorithms including impact of SOC components (memory and bus impacts)
- On-device correlation and tuning of algorithm versus pre-silicon predictions
- Implementing SW algorithms for mapping ML/AI workloads on Qualcomm HW
- Interface with other cross-site and cross-functional teams to arrive at best-in-class algorithms
- Master's degree or equivalent in Engineering, Information Systems, Computer Science, or related field.
- 2+ years Hardware Engineering, Systems Engineering, or related work experience.
- Ability to code in Python
- Proficiency in Excel including VBA scripting
- Experience in modeling hardware and workloads in order to extract performance and power estimates
- Architectural-level hardware modeling experience preferred
- Strong background in algorithm development and analysis is essential
- Strong software engineering principles are essential
- Strong communication skills (written and verbal)
- Detail-oriented with strong problem-solving, analytical and debugging skills
- Demonstrated ability to learn, think and adapt in a fast-changing environment
- Preferred exposure to front-end ML frameworks (i.e.,TensorFlow, PyTorch, ONNX)
- Experience in compiler design and development is an asset
- Knowledge of different classes of ML models (i.e. LLM, LVM, CNN, etc)
- Knowledge of computer architecture, digital circuits and hardware simulators
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